What was finalized on 16 September 2026

Anderon LLC, the quantum foundry subsidiary IBM formed in May 2026, announced that its $1 billion CHIPS and Science Act award with the US Department of Commerce is final. The award funds research and development at a 300-millimeter wafer fab in Albany, New York; IBM contributes a further $1 billion in cash. The company says the first quantum wafers are already running through the line, for superconducting qubit arrays, quantum input/output signaling and readout signal chain components, with other modalities to follow. It is the largest single item in the $2.013 billion quantum portfolio Commerce announced through nine letters of intent on 21 May 2026.

The claim under test: pure-play

Both IBM releases call Anderon a pure-play quantum foundry. In the semiconductor industry that phrase has a precise meaning since TSMC's founding in 1987: a fab that sells manufacturing and sells no chips of its own, so that customers who compete with each other can trust it with their designs. Anderon is described only as an IBM company, the release quotes IBM Research's director on IBM's own roadmap as the need Anderon meets, and the May release says additional investors are expected as Anderon grows. Anderon's website promises that the manufacturing partner will never compete with a customer's products. No external customer is named in either release.

Why the distinction matters for public money

Commerce is funding two quantum foundries under different theories: Anderon for superconducting wafers, and GlobalFoundries' $375 million foundry for five modalities. Whether Anderon becomes a shared national quantum wafer manufacturing base for companies that compete with IBM is a question the public documents leave open; the first non-IBM wafer customer, and the terms that protect its designs, are not yet public.

What Taiwan signed on 12 February 2026

The Agreement on Reciprocal Trade between the United States and Taiwan, concluded through the American Institute in Taiwan and the Taipei Economic and Cultural Representative Office, carries a Section 5 headed Economic and National Security. Article 5.2 aligns Taiwan's export controls with those in force in the United States, including the Foreign Direct Product Rule on semiconductors, and its ninth paragraph commits the Taiwan side to robust research security and to no new agreements, partnerships or similar arrangements for science and technology cooperation with authorities of countries of concern, especially in artificial intelligence, biotechnology and quantum computing. The agreement is signed; under Article 7.5 it enters into force the day after the last notification that internal procedures are complete, and the February USTR fact sheet says the Taiwan side will submit it to its legislature for review. Whether that notification has since been given is not stated in any USTR release this post could find.

What the University of Calgary paper adds

Carlo Dade and Alex Giordano of the School of Public Policy compared the 21 Agreements on Reciprocal Trade the United States had concluded by August 2026. They range from formal trade agreements to frameworks, memorandums and news releases, all executive arrangements with no congressional participation. Nearly every one contains provisions aimed at limiting China's role in the partner's economy; Malaysia agreed to mirror US export controls with equivalent restrictive effect, and Taiwan's Foreign Direct Product Rule alignment was matched by no other deal they reviewed.

Why it matters beyond Taiwan

A government commitment to enter no new research arrangements with authorities of countries of concern, quantum computing named among the fields, is carried by a trade arrangement that either side can terminate on six months' notice, with no export-control rule of that kind on the books. The Calgary paper, like The Logic, reads the clause as aimed at China; the text itself names no country. This post reads the clause, the eight paragraphs around it, and what the same template would mean for Canada, for Europe's research-security rules and for the physicists whose collaborations will be tested against it.

What the three companies signed between 4 and 8 September 2026

Rigetti Computing and D-Wave Quantum both date their CHIPS and Science Act award agreements with the U.S. Department of Commerce to 4 September 2026. Rigetti entered the accompanying securities agreement on 8 September, with the share issuance expected the same day; D-Wave's filing states that it will enter its securities agreement and report issuance afterward. Both filings disclose a minority, non-controlling equity stake for Commerce as a condition of the award. Quantinuum announced finalization of its own $100 million CHIPS research award on 8 September; that release confirms the award and its manufacturing partners and discloses no equity, voting or issuance terms. All three sit inside a federal program of about $2 billion across nine companies announced in May 2026.

Why the instrument matters more than the amount

A grant closes when its milestones are audited. Stock does not close. Rigetti's agreement generally bars Commerce from voting the shares except on specified class-rights and business-combination matters, and D-Wave describes similarly narrow rights, so the department's leverage sits elsewhere: in transfer restrictions, registration rights, repurchase mechanics, intellectual property licenses, march-in rights and award remedies. The August 2025 Intel conversion is the ancestor of the mechanism and an imperfect precedent, because that stake is expressly passive, with no board seat and no governance or information rights.

Three public payments, three visibility regimes

Appropriated research money reports to Congress and federal equity reports through securities filings. A third payment is far harder to see: Cook County's Class 8 MICRO classification would cut the assessment rate on Chicago's South Works quantum campus from 25 percent to 10 percent for thirty years, an estimated $175 million reduction, subject to city and county review, with no community benefits agreement signed. This post reads the three instruments together, sets them beside the public auditing the science is already doing on itself, and asks what a public shareholder in quantum computing would need in order to know whether the position is working.

A 1999 result and a 2026 withdrawal, from the same company

NEC researchers at the Fundamental Research Laboratories in Tsukuba demonstrated the first coherent control of a superconducting qubit in a paper Nature received on 26 January 1999 and published on 29 April. That single-Cooper-pair box is the direct ancestor of the transmon circuits used at Google, IBM and Fujitsu. At the end of March 2026, NEC closed its own superconducting hardware program. Japanese outlets reported the shutdown between 4 and 7 September 2026, and NEC's press office declined to go beyond a line about continuing technical assessment.

What the 2022 Cabinet Office submission showed, and what NEC announced

On 6 December 2022 NEC filed a slide deck with Japan's Cabinet Office working group on practical quantum applications. Page 10 charts a four-qubit basic unit of superconducting parametrons scaling to 100 qubits and then past 1,000, for the quantum annealer. The hardware NEC went on to announce was an eight-qubit parametron annealing machine built with the National Institute of Advanced Industrial Science and Technology, offered to Tohoku University over the internet from June 2023. No public announcement of a 100-qubit NEC machine has been found.

Two European decisions from the same period point the other way

NEC judged the payback horizon too long. Days before the reporting appeared, the Novo Nordisk Foundation confirmed a 5,300-square-meter quantum chip plant for Copenhagen, and a European Commission official told a Parliament audience that the forthcoming EU Quantum Act "is not about budget." Three institutions, one question about how long to wait for quantum hardware to pay, three different answers.

Four documents issued between 4 August and 3 September 2026, read together in the week of 29 August to 4 September, each name a requirement their own sources cannot yet test

On 3 September 2026 the G7 Cybersecurity Working Group wrote public procurement into the transition to post-quantum cryptography, the same day a deployed-silicon preprint reported a class of ML-DSA defects that known-answer tests do not reach. On 2 September a United States congressional commission listed what the country lacks before an implantable brain-computer interface can reach a patient, with active reimbursement coverage on the list. On 27 and 28 August a quantum navigation supplier named the defense organizations it works with while a submission to the independent AUKUS Public Inquiry described quantum magnetic sensing as a threat to submarine stealth. And the Ninth Circuit's ruling of 4 August, attributing computer access to the user when an AI agent acts, met a research preview of 27 August in which agents operate laboratory pipettes.

The shape the four share, and where its cost lands

In each case the sources themselves identify a gap between the requirement and the capacity to meet or verify it: a conformance suite that a preprint shows cannot see a defect class, an approval in one jurisdiction with no coverage decision in another, adjacent sensing capabilities evaluated as a purchase by one office and as a threat by another, and an access ruling built on a record of screenshots where the laboratory example has none. The cost of the gap falls on whoever signs the document the requirement calls for. This long read sets the four side by side and draws one question per pillar for the people who will be asked to sign, with the founder's two War on the Rocks essays, on testing deployed systems and on a single accountable office at the National Security Council, holding the two ends of the answer for quantum governance.

Five research teams posted fault-tolerance preprints within two days, each on a different component of a protected computation

Between 2 and 3 September 2026 five preprints on fault-tolerant quantum computation appeared on arXiv from five research teams: two on computing with quantum low-density parity-check codes, and three on the encoding, the inter-module links and the decoding such a computation would need. Rahul Sahay, David Long and Vedika Khemani built a framework that puts logical Pauli, Clifford and non-Clifford gates on qLDPC codes in one homological language and used it to find constant-depth implementations of the full Clifford group on toric-code blocks and addressable CCZ gates in three dimensions. Tang, Duan and Wu showed how to run the nonlocal gates such codes need on a two-dimensional crystal of 512 ions without moving any of them, and simulated a logical error rate of one in a trillion. Hillmann, Eisert and Arzani lifted low-density lattice codes into the bosonic GKP setting. Schmidt and five co-authors halved the distillation distance needed for fault tolerance across modules joined by noisy Bell pairs. Liu, Zeng, Wu and Lao recovered discarded decoder samples to close up to 83 percent of the gap between practical and optimal decoding.

Where the gate count meets the migration calendar

A high-rate code stores many logical qubits in few physical ones; the open question has been what a gate on such a code costs. That cost is one of the quantities inside any estimate of when a cryptographically relevant attack on RSA or elliptic-curve keys becomes feasible. The Oratomic-led estimate of 30 March 2026 by Madelyn Cain and co-authors, 10,000 neutral-atom qubits for Shor's algorithm, rested in its authors' words on high-rate codes and efficient logical instruction sets, and Cloudflare cited that estimate among the developments behind its 7 April roadmap, which targets completion of its network migration in 2029. Mauritz Kop and Joseph Federici wrote in July that falling estimates make quantum readiness a present coordination problem with lead times of a decade or more, and these five papers are the week's work on the assumptions inside such estimates.

The question to put to any resource estimate

This post reads the five papers together and draws one diligence rule from them: a claim about how many physical qubits break an RSA or elliptic-curve key is only as good as the logical gate set it assumes, and that set is now being worked out paper by paper. Which of the five results a given estimate relies on is the question a committee can ask, and a reader of this site can check.

A twenty-qubit code carried two logical qubits, computed on them, and handed them to another code

On 2 September 2026 a Quantinuum team posted arXiv:2609.03194, reporting three experiments on the company's 98-qubit Helios trapped-ion processor with a [[20,2,6]] C4-Helix code: twenty physical qubits holding two logical qubits at distance six. Repeated error correction over twenty rounds gave a logical error of 4.6 × 10−5 per logical qubit per cycle, down from 2.1 × 10−4 for the smaller [[10,2,3]] code on the same machine. Randomized benchmarking of the complete Clifford group on the two logical qubits, with active correction between gates, gave 2.8 × 10−4 per two-qubit logical Clifford against 1.2 × 10−3 for unencoded ions. A chain-map CNOT into a 25-qubit distance-five surface code prepared a three-qubit GHZ state at a fidelity lower bound of 99.925 percent against 99.54 percent physical. None of the three figures relies on discarding failed runs; the Clifford and GHZ results beat their stated physical baselines, and the memory result improved on the smaller logical code.

What the authors say is still missing

The paper's discussion section states that no universal Clifford+T computation was implemented, that the non-Clifford resource states must be imported through the interface just demonstrated, and that the measured error rates sit around 10−4 where the early fault-tolerant regime the authors target begins at 10−6. Their simulations put that regime within reach once physical two-qubit infidelity improves by about an order of magnitude from the 7.9 × 10−4 reported in the Helios technical paper of 7 November 2025. Decoding for the memory experiment was done offline, and the confidence interval on the memory figure runs from 2.0 × 10−5 to 1.08 × 10−4.

The four numbers a proposal should carry

This post reads the result against the processor's own baseline and draws one diligence rule from it: a logical error rate is meaningful only beside the physical rate on the same machine, the physical qubits consumed per logical qubit, and the set of operations the code can perform while protected. This paper supplies all four and names what it has not done, which is the form a checkable error-correction claim takes.